[hpc-announce] HOTI 2013: Deadline extension - 21st Int'l Symposium on High Performance Interconnects

Cyriel Minkenberg sil at zurich.ibm.com
Mon May 6 08:54:40 CDT 2013

                             CALL FOR PAPERS
      21st International Symposium on High Performance Interconnects
                                HotI 2013

                            Cisco Headquarters
                           San Jose, California
                            August 21-23, 2013

         Follow us on Twitter: http://twitter.com/HotiConference

========================== DEADLINE EXTENSION =========================

* Paper abstract deadline:      May 10, 2013
* Submission deadline:          May 17, 2013
* Notification of acceptance:   June 16, 2013


Hot Interconnects is the premier international forum for researchers and
developers of state-of-the-art hardware and software architectures and
implementations for interconnection networks of all scales, ranging from
multi-core on-chip interconnects to those within systems, clusters, data
centers, and clouds. This yearly conference is attended by leaders in
industry and academia. The atmosphere provides for a wealth of
opportunities to interact with individuals at the forefront of this

Themes include cross-cutting issues spanning computer systems,
networking technologies, and communication protocols for
high-performance interconnection networks. This conference is directed
particularly at new and exciting technology and product innovations in
these areas. Contributions should focus on real experimental systems,
prototypes, or leading-edge products and their performance evaluation.

Building on last year’s successful technical program comprising
keynotes, technical sessions, and panels on networking for datacenters
and high-performance computing, the 2013 edition of Hot Interconnects is
generously hosted by Cisco at their Headquarters in San Jose, CA. This
year's conference focuses on the convergence of networking across the
embedded, commercial, data center, and HPC domains. We hope you can join
us there.

We invite paper submissions across a wide range of topics and levels,
ranging from fundamentals to the latest advances in hot topic areas.
Topics of interest include, but are not limited to:


* Novel and innovative interconnect architectures
* Multi-core processor interconnects
* System-on-Chip Interconnects
* Advanced chip-to-chip communication technologies
* Optical interconnects
* Protocol and interfaces for inter-processor communication
* Survivability and fault-tolerance of inter-connects
* High-speed packet processing engines and network processors
* System and storage area network architectures and protocols
* High-performance host-network interface architectures
* High-bandwidth and low-latency I/O
* Pb/s switching and routing technologies
* Innovative architectures for supporting collective communication
* Novel communication architectures to support cloud & grid computing
* Centralized and distributed cloud interconnects
* Requirements driving high-performance inter-connects
* Traffic characterization for HPC systems and commercial data centers
* Software-defined networking and software overlay networks
* Software for network bring-up, configuration and performance
   management (OpenFlow, OpenSM)
* Data Center Networking


* Paper abstract deadline:      May 10, 2013
* Submission deadline:          May 17, 2013
* Notification of acceptance:   June 16, 2013
* Symposium:                    August 21-22, 2013
* Tutorials:                    August 23, 2013

In a change from previous years, this year we invite papers to be
submitted either as regular, long papers (6-8 pages) or as short papers
(3-4 pages). Short papers could be positional papers, industry papers,
or papers describing hot-off-the-press breaking research results, and
will judged accordingly and independently from the regular long papers.

* Papers need sufficient technical detail to judge quality and
   suitability for presentation.
* Submissions should include title, author, abstract, and paper in
   double-column, IEEE format.
* Long paper limit: 8 pages, single-spaced, 2 columns.
* Short paper limit: 4 pages, single-spaced, 2 columns.
* Papers should be submitted electronically through EasyChair at
* Paper title and abstract should be submitted by April 26.
* Full paper manuscript should be submitted is by May 10.
* Accepted papers will be published in proceedings by the IEEE Computer
* Regular paper presentations are 30-minute talks in a single-track
   conference format.


Madeleine Glick, APIC Corporation
Torsten Hoefler, ETH Zurich
Fabrizio Petrini, IBM T.J. Watson


Cyriel Minkenberg, IBM Research Zurich
Sudipta Sengupta, Microsoft Research


Pavan Balaji, Argonne National Laboratory
Christian Bell, Myricom
Keren Bergman, Columbia University
Ron Brightwell, Sandia National Laboratories
Luca Carloni, Columbia University
David Cohen, EMC
Hans Eberle, Oracle
Yashar Ganjali, University of Toronto
Ada Gavrilovska, Georgia Institute of Technology
Patrick Geoffray, Myricom
Paolo Giaccone, Politecnico di Torino
Brice Goglin, INRIA
Mitchell Gusat, IBM Research - Zurich
Ron Ho, Oracle
Ajay Joshi, Boston University
Isaac Keslassy, Technion
Sameer Kumar, IBM Research
Rami Melhem, University of Pittsburgh
Mondrian Nuessle, University of Heidelberg
Greg Pfister, Independent Computer Hardware Professional
Galen Shipman, Oak Ridge National Laboratory
Tor Skeie, University of Oslo/Simula
Craig Stunkel, IBM Research
Keith Underwood, Intel
Anujan Varma, University of California
Phil Watts, University College London
Eitan Zahavi, Mellanox

Please contact us at info at hoti.org if you have any questions.

Go to the Hot Interconnects web site for updates: www.hoti.org

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