[hpc-announce] GPGPU6 Call for Participation (ASPLOS 13 workshop)

[Jeremy Singer]

         CALL FOR PARTICIPATION
                ** GPGPU6 2013 **

http://www.ece.neu.edu/groups/nucar/GPGPU/GPGPU6/


Sixth Workshop on General Purpose Processing Using GPUs
           Houston, Texas, March 16 2013

Registration site is now open.

We are please to announce the following keynote on the Xeon Phi:

"Intel Xeon Phi programmability: the good, the bad and the ugly."

Abstract: The talk will focus on the programming model of the Intel Xeon Phi coprocessor, draw comparisons to programming CPUs on the one hand and to programming GPUs on the other hand. What does programming Xeon Phi have in common with each? Programming the Xeon Phi coprocessor involves multiple aspects, and includes utilizing many cores, explicitly utilizing the vector execution units within the cores, potentially utilizing the HW multi-threading within the cores, writing cache efficient algorithm. Optionally, it may also involve communicating with a host processor.  The talk will explore some of the technology challenges, the broader industry impact and future directions.

Speaker: Robert Geva. Principle Engineer, Parallel Language Architect,
Intel.

The program includes 15 exciting papers on a range of GPU topics.

http://www.ece.neu.edu/groups/nucar/GPGPU/GPGPU6/FinalProgram.pdf


Co-located with ASPLOS.

http://asplos13.rice.edu/


We look forward to seeing you at the workshop on March 16th!

Organizing Committee
John Cavazos and David Kaeli