[hpc-announce] CALL FOR PAPERS: MSPC 2013 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness

Hyesoon Kim hyesoon at cc.gatech.edu
Sat Mar 2 08:51:52 CST 2013

      ACM SIGPLAN Workshop on Memory Systems Performance and Correctness

				   June, 2013
		 Co-located with PLDI 2013, Seattle, Washington


			     Paper deadline:    March 15, 2013
			     Notification:      April 20, 2013

Memory continues to be a major bottleneck in almost all computing systems.
It is becoming more so as more cores and agents are sharing parts of the
memory system and as applications that run on the cores are becoming 
increasingly data intensive. Continuing the tradition of seven previous 
successful incarnations, MSPC 2013 will provide a forum for publishing 
and discussing all aspects of memory performance and correctness on 
a variety of systems (multi-core, desktop, embedded, server/cloud, 
high-performance computing, sensor, etc) and related software and 
hardware innovations at various levels of the technology stack. We 
invite new submissions that tackle issues in memory system 
performance, efficiency, correctness, and dependability in 
both hardware and software layers. Example areas of interest
 include but are not limited to the following:

   * Hardware, software, and hybrid techniques for better memory
performance, correctness, reliability, efficiency
   * Memory hierarchy design for chip multiprocessors (CMPs)
   * Emerging memory technologies (e.g., Phase Change Memory, MRAM)
   * Characterization and analysis of memory systems performance
   * Insightful experimental evaluation and analysis of memory-intensive
   * Static and dynamic techniques for understanding and improving memory
     performance and efficiency
   * Managed memory and garbage collection optimizations
   * Hardware and software techniques for ensuring memory safety and
detecting memory-related bugs
   * Hardware and software memory models and their impact on
programmability and performance
   * Memory system issues in accelerator-based computing (e.g., GPGPU)
   * Memory system issues in embedded computers and tiny devices
   * Prefetching, compression, latency tolerance techniques for memory
   * Memory power and energy management techniques
   * Memory reliability management techniques

Software, hardware, and hybrid approaches are encouraged. In addition, we
solicit papers from practitioners describing problems and experiences with
memory performance and correctness in specific application domains.

Submission Guidelines: We encourage the submission of not-fully-polished
but provocative short papers (6--8 pages; 8 pages maximum) or position
abstracts (1--2 pages; 2 pages maximum). Paper submissions should use 
standard ACM SIGPLAN conference format (10pt). Copies of accepted papers
 will be made available at the workshop and published in the ACM digital library.
Submitted papers must not be simultaneously under review for any other conference 
or journal, and authors should point out any substantial overlap with their 
previously published or currently submitted work.


General Chair

       Gabriel Loh, AMD

Program Chair

       Hyesoon Kim, Georgia Tech
       Daniel Chavarria, Pacific Northwest National Lab

Program Committee
       Philippe Clauss, INRIA 
       John Cavazos, University of Delaware
       Daniel Chavarria, Pacific Northwest National Lab
       Boris Grot, EPFL 
       Jeff Hammond, Argonne National Lab
       Hillery Hunter, IBM 
       Hyesoon Kim, Georgia Tech
       Minjang Kim, Qualcomm
       Jaejin Lee, Seoul National University
       Costin Iancu, Lawrence Berkely National Laboratory
       Jim Larus, Microsoft Research
       Lawrence  Rauchwerger, Texas A&M
       Wenjing Ma, Chinese Academy of Sciences 
       Mayur Naik, Georgia Tech
       Satish Narayanasamy, University of Michigan
	 Vijay Reddi, UT-Austin
       Xipeng Shen, William and Mary
       Antonino Tumeo, Pacific Northwest National Lab
       Jeffery Vetter, Oak Ridge National Lab & Georgia Tech
       Uzi Vishkin, University Maryland

Steering Committee

	Emery Berger, UMass Amherst
	Brad Chen, Google
	Trishul Chilimbi, Microsoft Research
	Chen Ding, Rochester
	Madan Musuvathi, Microsoft Research
	Onur Mutlu, Carnegie Mellon University
	Xipeng Shen, College of William & Mary
	Jeffrey S. Vetter, Oak Ridge National Lab & Georgia Tech
	Ben Zorn, Microsoft Research

Web and Submissions Chairs

       Jaekyu Lee, Georgia Tech

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