[hpc-announce] CFP : Workshop on Multicore and GPU Programming Models, Languages and Compilers Workshop, PLC 2013, Boston, USA

Sunita Chandrasekaran sunita at cs.uh.edu
Tue Nov 27 11:59:11 CST 2012

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                International Workshop on
Multicore and GPU Programming Models, Languages and Compilers Workshop
                           (PLC 2013)

                  held in conjunction with the
                       27th International
      Parallel and Distributed Processing Symposium (IPDPS 2013)

                  Boston, USA, May 20th, 2013



The developer is challenged to come up with a programming strategy that will
cater to the three important pillars of heterogeneous systems; Productivity,
Portability, Performance. Software is an expensive investment (especially in
a broad commercial context), creating a programming strategy with longevity
so that code may be written once and ported easily, so more than one
hardware platform may be utilized. Having said that, how to seamlessly
execute legacy applications on heterogeneous platforms that consist of
general purpose processors and accelerators by hiding the underlying low
level details of the platform from the programmer? There are other
programming challenges such as exploiting fine grain parallelism and
locality-aware scheduling. This workshop aims to bring the programming
community together to explore and discuss various options to make
programming heterogeneous systems less challenging and more interesting. The
workshop seeks to explore programming methodologies in the form of
directive-based approaches, language extensions, novel tools and techniques
to create a portable, scalable and productive programming environment. This
workshop provides a forum for the presentation of research on all aspects of
heterogeneous systems programming models, compiler optimizations, language
extensions, and software tools for such systems.

Areas of interest include but are not limited to the following topics:

    * Multicore processors and Heterogeneous systems
    * Programming models: thread and task based models, data parallel
models, stream programming
    * Language extensions for GPU programming/environments:
        C/C++ extensions for GPU programming
        OpenMP extensions for Accelerator
    * Compiler optimizations and tuning Heterogeneous systems
        Parallelization and locality optimizations
        Reducing synchronization and scheduling overheads on GPU and
        Tiling, parametric tiling and offloading
    * Runtime systems for Heterogeneous systems
    * Debuggers, and performance analysis tools for Heterogeneous systems
    * Operating systems and virtual shared memory for Heterogeneous systems
    * Software tools for discovering parallelism
    * Application frameworks, Case studies, design patterns, and
domain-specific languages for developing manycore applications

Papers should present original research and should provide sufficient
background material to make them accessible to the broader community. In
addition, we solicit papers from practitioners describing problems and
experiences building software tools for Multicore processors and GPU

Full paper submissions should not exceed 10 pages in standard IEEE
conference format. Papers should be submitted electronically through the
workshop web site at easychair:

Proceedings of accepted papers will be made available at the workshop.
Selected papers will appear in the special issue of IEEE Journal (TBD
later). Authors of accepted papers will have the option to decide if they
want their papers to appear in this special issue. Submitted papers must not
be simultaneously under review for any other conferences, and authors should
point out any substantial overlap with their previously published or
currently submitted work.


    * Paper Submission Deadline: Jan 11th, 2013
    * Paper Acceptance Notification: Feb 15th, 2013
    * Camera Ready Due: Feb 21th, 2013
    * Workshop Date: May 20th, 2013



    Guang R. Gao, University of Delaware, US
    Bob Kuhn, Intel, US
    Wenguang Chen, Tsinghua Universityi, China
    Jingling Xue, University of New South Wales, Australia


    Barbara Chapman, University of Houston, US
    Weimin Zheng, Tsinghua University, China


    Xinmin Tian, Intel, US
    Yonghong Yan (yanyh at cs.uh.edu), University of Houston, US

Sunita Chandrasekaran (sunita at cs.uh.edu), University of Houston, US


    Mike Heroux, Sandia Lab, US
    Francois Bodin, CAPS, France
    Matthias Muller, TU Dresden, Germany
    Eric Stahlberg, NCI-CCR/SAIC Frederick,US
    Pavan Balaji, Argonne National Laboratory, US
    Bronis R. de Supinski, LLNL, US
    Jim Holt, Freescale Semiconductor, US
    Duncan Poole, NVIDIA, US
    Sunita Chandrasekaran, University of Houston, US
    James Beyer, Cray Inc. US
    Yong Chen, Texas Tech University, US
    Haibo Chen, Fudan University, China
    Jingling Xue, University of New South Wales, Australia
    Albert Cohen, INRIA


Please send any queries about the PLC workshop to sunita at cs.uh.edu

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