<html>
<head>
<meta http-equiv="content-type" content="text/html;
charset=ISO-8859-1">
</head>
<body bgcolor="#FFFFFF" text="#000000">
<br>
<meta http-equiv="content-type" content="text/html;
charset=ISO-8859-1">
<div class="moz-text-html" lang="x-western">
<div class="moz-text-flowed" style="font-family: -moz-fixed;
font-size: 12px;" lang="x-western">### We apologize if you
receive multiple copies of this CFP ### <br>
<br>
<br>
**********************************************************************
<br>
CALL FOR PAPERS <br>
First Workshop on Data-Flow Execution Models for Extreme <br>
Scale Computing (DFM 2011) <br>
in conjunction with PACT 2011 <br>
<br>
Galveston Island, Texas, USA, October 10, 2011, <br>
Submission: August 15, 2011 <br>
<a moz-do-not-send="true"
class="moz-txt-link-freetext"
href="http://www.cs.ucy.ac.cy/dfm2011">http://www.cs.ucy.ac.cy/dfm2011</a>
<br>
**********************************************************************
<br>
<br>
The purpose of DFM is to bring together researchers that are
interested <br>
into novel computational model based on the Data-Flow principles
of <br>
execution. <br>
The switch to multi-core systems has elevated concurrency as a
major <br>
issue in utilizing the ever increasing number of cores in a
chip. <br>
Sequential computing has dominated the computer architecture
landscape <br>
for five decades. Designers were able to design and build faster
and faster <br>
computers by relying on improvements on fabrication technologies
and <br>
architectural/organization optimizations. The most severe
limitation of <br>
the sequential model, namely its inability to tolerate long
latencies has <br>
slowed down the performance gains, forcing the industry to hit
the <br>
Memory Wall and to switch to multiple cores per chip and thus
move <br>
into the concurrency era. New concurrent models/paradigms are
needed <br>
in order to fully utilize the potential of Multi-core chips. <br>
The Data-flow model is a formal model that can handle
concurrency and <br>
it can tolerate memory and synchronization latencies. Data-Flow
inspired <br>
systems could also be simpler and more power efficient than
conventional <br>
systems. <br>
Recent work on Data-flow inspired systems has shown that the
Data-Flow <br>
principles can be used to develop data-driven systems that can
perform <br>
as good and in some cases outperform systems that are based on <br>
conventional techniques, running on commercial Multi-core
systems. Thus, <br>
it is time to revisit Data-driven computation and bring it to
the Multi-core <br>
and extreme scale computing. <br>
<br>
DFM solicits novel papers that include but are not limited to: <br>
* Novel Data-Flow inspired Execution models and architectures <br>
* Functional and Single assignment based Languages. <br>
* Strict and non-strict execution models. <br>
* Compilers and tools for Data-Flow/Data-Driven systems. <br>
* Hybrid Data-driven/Control-Driven systems. <br>
* Survey papers on Data-Flow/Data-Driven systems. <br>
* Position Papers on the Future of Data-Flow in the Multi-core
era and <br>
beyond. <br>
<br>
Extended Versions of the best papers will be published in a
special issue <br>
of the IJPP. <br>
<br>
Organizing Committee <br>
============== <br>
Skevos Evripidou, University of Cyprus <br>
Guang Gao, University of Delaware <br>
Jean-Luc Gaudiot, University of California at Irvine <br>
Vivek Sarkar, Rice University <br>
Ian Watson, University of Manchester <br>
Kei Hiraki, University of Tokyo <br>
David Abramson, Monash University <br>
Pedro Trancoso, University of Cyprus (Publicity Chair) <br>
<br>
Submission Information <br>
=============== <br>
Full papers should be prepared using the ACM SIG Proceedings
format, <br>
and should be no longer than 8 pages. <br>
Short Papers should be submitted in the form of extended
abstracts <br>
(up to 4 pages). <br>
<br>
Important Dates <br>
========== <br>
Submission deadline: Aug 15 <br>
Notification of Authors: Sept 5 <br>
<br>
<br>
</div>
</div>
</body>
</html>