<HTML><BODY style="word-wrap: break-word; -khtml-nbsp-mode: space; -khtml-line-break: after-white-space; "><DIV>All</DIV><DIV>Please pass this information to anyone who you think might be interested.</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>thank you</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>Paul</DIV><DIV><BR class="khtml-block-placeholder"></DIV><P style="margin: 0.0px 0.0px 10.0px 0.0px"><FONT class="Apple-style-span" color="#026798" face="Arial" size="4"><SPAN class="Apple-style-span" style="font-size: 16px;"><B>Symposium on Multicore and New Processing Technologies</B></SPAN></FONT></P><FONT class="Apple-style-span" color="#0000EE" face="Arial"><SPAN class="Apple-style-span" style=""><FONT class="Apple-style-span" color="#000000" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">A symposium exploring the capabilities and use of new high performance computing (HPC) technologies is taking place Aug. 13 – 14 on the campus of the University of Alaska Fairbanks in conference room 010 of the West Ridge Research Building. Space is limited for this free symposium and registration is required.</SPAN></FONT></SPAN></FONT><P style="margin: 0.0px 0.0px 12.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">The two-day symposium is hosted by the Arctic Region Supercomputing Center, a national leader in the ongoing evaluation of current and next-generation processing technologies to improve the speed, memory functions and efficiencies of supercomputers. ARSC is a charter member of the National Science Foundation’s Center for High Performance Reconfigurable Computing (CHPRC).</SPAN></FONT></P><P style="margin: 0.0px 0.0px 12.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">According to ARSC Chief Scientist Greg Newby, the technology path of semiconductors coupled with user requirements has created a change in processing hardware. “Physical limitations and power challenges have led to the development of multicore processors,” he said. “At the same time, special-purpose processing units for non-HPC markets are able to provide substantial processing powers in some applications. These include field programmable gate arrays (FPGAs), graphical processing units (GPUs) and gaming processors such as the CELL BE processor, which can be used as a standalone processor or as an application acceleration co-processor.”</SPAN></FONT></P><P style="margin: 0.0px 0.0px 12.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">Participants in the symposium will address the following questions:</SPAN></FONT></P><UL><LI style="margin: 0.0px 0.0px 0.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">How do applications scale with the multiplicity of cores, envisioning near-future petaFLOP systems with multiple cores in each CPU socket?</SPAN></FONT></LI><LI style="margin: 0.0px 0.0px 0.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">What hardware limitations and features, such as memory bandwidth and shared cache, impact scalability of applications?</SPAN></FONT></LI><LI style="margin: 0.0px 0.0px 0.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">How do graphical, gaming and reconfigurable processors compare in real-world applications?</SPAN></FONT></LI><LI style="margin: 0.0px 0.0px 0.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">Are existing operating systems adequate to deal with those technologies? If not, what is missing and how can shortcomings be addressed?</SPAN></FONT></LI><LI style="margin: 0.0px 0.0px 0.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">What programming tools are currently available for those technologies, and what new tools are needed?</SPAN></FONT></LI></UL><P style="margin: 0.0px 0.0px 12.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">“In order to address these and other questions of relevance to the high performance computing community, ARSC is taking the lead once again in this area by holding this summer symposium on multicore and new processing technologies,” Newby said.</SPAN></FONT></P><P style="margin: 0.0px 0.0px 12.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">Invited speakers and discussion panels will include a number of experts to pose and address these and other issues in greater details.</SPAN></FONT></P><P style="margin: 0.0px 0.0px 12.0px 0.0px"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">For more information about ARSC or to register for the symposium, visit </SPAN></FONT><A href="http://www.arsc.edu/"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;"><FONT class="Apple-style-span" color="#026798">www.arsc.edu</FONT></SPAN></FONT></A><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;"> or email Greg Newby at </SPAN></FONT><A href="mailto:newby@arsc.edu"><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;"><FONT class="Apple-style-span" color="#026798">newby AT arsc.edu</FONT></SPAN></FONT></A><FONT class="Apple-style-span" face="Arial" size="3"><SPAN class="Apple-style-span" style="font-size: 12px;">.</SPAN></FONT></P><DIV><BR class="khtml-block-placeholder"></DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV><B>Proposed Agenda (subject to change)</B></DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>Symposium on Multicore and New Processing Technologies</DIV><DIV><SPAN class="Apple-tab-span" style="white-space:pre"> </SPAN> Arctic Region Supercomputing Center</DIV><DIV><SPAN class="Apple-tab-span" style="white-space:pre"> </SPAN> August 13-14 2007</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>All times are Alaska time. -9 UTC, -4 eastern</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>Monday August 13</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 8:30 Registration and breakfast</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 9:00 Opening remarks. Frank Williams, ARSC</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 9:15 Workshop overview. Greg Newby, ARSC</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 9:30 Understanding 8-socket dual-core HPC performance at ARSC.</DIV><DIV> Ed Kornkven, ARSC</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>10:30 Break</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>11:00 Cache coherency and other factors in multi-socket multi-core</DIV><DIV> performance. Abdullah Kayi, GWU</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>11:45 High level language characteristics for FPGA programming.</DIV><DIV> Tarek El-Ghazawi, GWU</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>12:30 Lunch </DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 1:30 Accelerating floating-point kernels via FPGAs.</DIV><DIV> Gerald (Jerry) Morris, ERDC</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 2:15 Adaptive supercomputing at Cray.</DIV><DIV> Charles Giefer, Cray</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 3:00 DNA and protein sequence alignment with high performance</DIV><DIV> reconfigurable systems. Greg Newby, ARSC</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 3:45 Break</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 4:00 FPGA libraries for HPC. Olivier Serres & Miaoqing Huang, GWU</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>Tuesday August 14</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 8:30 Registration and Breakfast</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 9:00 Panel: Readiness of FPGAs for an HPC workload</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 9:45 Playstation CELL cluster experiences. Preethan Nusum, GWU</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>10:30 Break</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>11:00 Comparison of FPGA and cell (PS3) implementations of a</DIV><DIV> Brain-State-in-a-Box cognitive model. Richard Linderman &</DIV><DIV> Daniel Burns, AFRL</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>11:45 GPUs for general-purpose programming. Greg Newby, ARSC </DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>12:10 Discussion: Readiness of GPUs for an HPC workload </DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>12:30 Lunch </DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 1:30 Closing session: Formulating messages to developers, users,</DIV><DIV> and vendors on the prospects of multicore processors and</DIV><DIV> acceleration technology. Greg Newby, moderator</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV> 2:30 Symposium ends</DIV><BR><DIV> <SPAN class="Apple-style-span" style="border-collapse: separate; border-spacing: 0px 0px; color: rgb(0, 0, 0); font-family: Helvetica; font-size: 14px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; text-align: auto; -khtml-text-decorations-in-effect: none; text-indent: 0px; -apple-text-size-adjust: auto; text-transform: none; orphans: 2; white-space: normal; widows: 2; word-spacing: 0px; "><DIV><BR class="khtml-block-placeholder"></DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV>Paul Mercer</DIV><DIV>Arctic Region Supercomputing Center</DIV><DIV>907 450 8649</DIV><DIV><BR class="khtml-block-placeholder"></DIV><DIV><BR class="khtml-block-placeholder"></DIV><BR class="Apple-interchange-newline"></SPAN> </DIV><BR></BODY></HTML>